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Processing big-data with memristive technologies: splitting the hyperplane efficiently

Processing big-data with memristive technologies: splitting the hyperplane efficiently
Processing big-data with memristive technologies: splitting the hyperplane efficiently
An important cornerstone of data processing is the ability to efficiently capture structure in data. This entails treating the input space as a hyperplane that needs partitioning. We argue that several modern electronic systems can be understood as carrying out such partitionings: from standard logic gates to Artificial Neural Networks (ANNs). More recently, memristive technologies equipped such systems with the benefit of continuous tunability directly in hardware, thus rendering these reconfigurable in a power and space efficient manner. Here, we demonstrate several proof-of-concept examples where memristors enable circuits optimised to carry out different flavours of the fundamental task of splitting the hyperplane. These include threshold logic and receptive field based classifiers that are presented within the context of a unified perspective.
2379-447X
IEEE
Serb, Alexantrou
30f5ec26-f51d-42b3-85fd-0325a27a792c
Papandroulidakis, Georgios
518ddb08-ebeb-4026-829d-7a3db4fd3275
Khiat, Ali
bf549ddd-5356-4a7d-9c12-eb6c0d904050
Prodromakis, Themistoklis
d58c9c10-9d25-4d22-b155-06c8437acfbf
Serb, Alexantrou
30f5ec26-f51d-42b3-85fd-0325a27a792c
Papandroulidakis, Georgios
518ddb08-ebeb-4026-829d-7a3db4fd3275
Khiat, Ali
bf549ddd-5356-4a7d-9c12-eb6c0d904050
Prodromakis, Themistoklis
d58c9c10-9d25-4d22-b155-06c8437acfbf

Serb, Alexantrou, Papandroulidakis, Georgios, Khiat, Ali and Prodromakis, Themistoklis (2018) Processing big-data with memristive technologies: splitting the hyperplane efficiently. In 2018 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE. 5 pp . (doi:10.1109/ISCAS.2018.8351773).

Record type: Conference or Workshop Item (Paper)

Abstract

An important cornerstone of data processing is the ability to efficiently capture structure in data. This entails treating the input space as a hyperplane that needs partitioning. We argue that several modern electronic systems can be understood as carrying out such partitionings: from standard logic gates to Artificial Neural Networks (ANNs). More recently, memristive technologies equipped such systems with the benefit of continuous tunability directly in hardware, thus rendering these reconfigurable in a power and space efficient manner. Here, we demonstrate several proof-of-concept examples where memristors enable circuits optimised to carry out different flavours of the fundamental task of splitting the hyperplane. These include threshold logic and receptive field based classifiers that are presented within the context of a unified perspective.

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ISCAS2018-AlexantrouSerb - Accepted Manuscript
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Accepted/In Press date: 1 January 2018
e-pub ahead of print date: 4 May 2018

Identifiers

Local EPrints ID: 425709
URI: http://eprints.soton.ac.uk/id/eprint/425709
ISSN: 2379-447X
PURE UUID: f4b345d7-be5f-4438-a46b-aec2ba2a013b
ORCID for Georgios Papandroulidakis: ORCID iD orcid.org/0000-0002-9203-2557
ORCID for Themistoklis Prodromakis: ORCID iD orcid.org/0000-0002-6267-6909

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Date deposited: 01 Nov 2018 17:30
Last modified: 16 Mar 2024 07:13

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Contributors

Author: Alexantrou Serb
Author: Georgios Papandroulidakis ORCID iD
Author: Ali Khiat
Author: Themistoklis Prodromakis ORCID iD

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