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VLSI implementation of a fully-pipelined K-best MIMO detector with successive interference cancellation

VLSI implementation of a fully-pipelined K-best MIMO detector with successive interference cancellation
VLSI implementation of a fully-pipelined K-best MIMO detector with successive interference cancellation
Multiple-input multiple-output (MIMO) technology is envisaged to play an important role in future wireless communications. To this end, novel algorithms and architectures are required to implement high-throughput MIMO communications at low power consumption. In this paper, we present the hardware implementation of a modified K-best algorithm combining conventional K-best detection and low-complexity successive interference cancellation at different levels of the tree search. The detector is implemented using a fully-pipelined architecture, which detects one symbol vector per clock cycle. To reduce the power consumption of the entire receiver unit, costly symbol-rate operations such as multiplication are eliminated both within and outside the detector without any impact on the performance. The hardware implementation of the modified K-best algorithm achieves area and power reductions of 16% and 38%, respectively, compared with the conventional K-best algorithm implementation, while incurring a signal-to-noise ratio penalty of 0.3 dB at the target bit error rate. Post-synthesis analysis shows that the detector achieves a throughput of 3.29 Gbps at a clock frequency of 137 MHz with a power consumption of 357 mW using a 65-nm CMOS process, which compares favourably with the state-of-the-art implementations in the literature.
0278-081X
1-23
Bello, Ibrahim
b9ef7b75-b7eb-435d-a4e5-186f48f328ea
Halak, Basel
8221f839-0dfd-4f81-9865-37def5f79f33
El-Hajjar, Mohammed
3a829028-a427-4123-b885-2bab81a44b6f
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Bello, Ibrahim
b9ef7b75-b7eb-435d-a4e5-186f48f328ea
Halak, Basel
8221f839-0dfd-4f81-9865-37def5f79f33
El-Hajjar, Mohammed
3a829028-a427-4123-b885-2bab81a44b6f
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0

Bello, Ibrahim, Halak, Basel, El-Hajjar, Mohammed and Zwolinski, Mark (2019) VLSI implementation of a fully-pipelined K-best MIMO detector with successive interference cancellation. Circuits Systems and Signal Processing, 1-23. (doi:10.1007/s00034-019-01079-0).

Record type: Article

Abstract

Multiple-input multiple-output (MIMO) technology is envisaged to play an important role in future wireless communications. To this end, novel algorithms and architectures are required to implement high-throughput MIMO communications at low power consumption. In this paper, we present the hardware implementation of a modified K-best algorithm combining conventional K-best detection and low-complexity successive interference cancellation at different levels of the tree search. The detector is implemented using a fully-pipelined architecture, which detects one symbol vector per clock cycle. To reduce the power consumption of the entire receiver unit, costly symbol-rate operations such as multiplication are eliminated both within and outside the detector without any impact on the performance. The hardware implementation of the modified K-best algorithm achieves area and power reductions of 16% and 38%, respectively, compared with the conventional K-best algorithm implementation, while incurring a signal-to-noise ratio penalty of 0.3 dB at the target bit error rate. Post-synthesis analysis shows that the detector achieves a throughput of 3.29 Gbps at a clock frequency of 137 MHz with a power consumption of 357 mW using a 65-nm CMOS process, which compares favourably with the state-of-the-art implementations in the literature.

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More information

Accepted/In Press date: 26 February 2019
e-pub ahead of print date: 15 March 2019

Identifiers

Local EPrints ID: 429328
URI: https://eprints.soton.ac.uk/id/eprint/429328
ISSN: 0278-081X
PURE UUID: 57d5521d-000a-4605-8abd-6eb67614c4b1
ORCID for Basel Halak: ORCID iD orcid.org/0000-0003-3470-7226
ORCID for Mohammed El-Hajjar: ORCID iD orcid.org/0000-0002-7987-1401
ORCID for Mark Zwolinski: ORCID iD orcid.org/0000-0002-2230-625X

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Date deposited: 26 Mar 2019 17:30
Last modified: 18 Jul 2019 01:23

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