Design, fabrication and characterisation of advanced substrate crosstalk suppression structures in silicon-on-insulator substrates with buried ground planes (GPS01)
Design, fabrication and characterisation of advanced substrate crosstalk suppression structures in silicon-on-insulator substrates with buried ground planes (GPS01)
 
  Substrate crosstalk or coupling has been acknowledged to be a limiting factor in mixed signal RF integration. Although high levels of integration and high frequencies of operation are desirable for mixed mode RF and microwave circuits, they make substrate crosstalk more pronounced and may lead to circuit performance degradation. High signal isolation is dictated by requirements for low power dissipation, reduced number of components and lower integration costs for feasible system-on-chip (SoC) solutions.
 Substrate crosstalk suppression in ground plane silicon-on-insulator (GPSOI) substrates is investigated in this thesis. Test structures are designed and fabricated on SOI substrates with a buried WSi2 plane that is connected to ground; hence it is called a ground plane. A Faraday cage structure that exhibits very high degrees of signal isolation is presented and compared to other SOI isolation schemes. The Faraday cage structure is shown to achieve 20 dB increased isolation in the frequency range of 0.5-50 GHz compared to published data for high resistivity (200 Ω.cm) thin film SOI substrates with no ground planes, but where capacitive guard rings were used. The measurement results are analysed with the aid of planar electromagnetic simulators and compact lumped element models of all the fabricated test structures are developed. The accuracy of the lumped models is validated against experimental measurements.
    University of Southampton
   
  
    
      Stefanou, Stefanos
      
        4c5bfd35-9960-4ae5-a62e-6f11600cff9c
      
     
  
  
   
  
  
    
      2002
    
    
  
  
    
      Stefanou, Stefanos
      
        4c5bfd35-9960-4ae5-a62e-6f11600cff9c
      
     
  
       
    
 
  
    
      
  
 
  
  
  
    Stefanou, Stefanos
  
  
  
  
   
    (2002)
  
  
    
    Design, fabrication and characterisation of advanced substrate crosstalk suppression structures in silicon-on-insulator substrates with buried ground planes (GPS01).
  University of Southampton, Doctoral Thesis.
  
   
  
    
      Record type:
      Thesis
      
      
      (Doctoral)
    
   
    
    
      
        
          Abstract
          Substrate crosstalk or coupling has been acknowledged to be a limiting factor in mixed signal RF integration. Although high levels of integration and high frequencies of operation are desirable for mixed mode RF and microwave circuits, they make substrate crosstalk more pronounced and may lead to circuit performance degradation. High signal isolation is dictated by requirements for low power dissipation, reduced number of components and lower integration costs for feasible system-on-chip (SoC) solutions.
 Substrate crosstalk suppression in ground plane silicon-on-insulator (GPSOI) substrates is investigated in this thesis. Test structures are designed and fabricated on SOI substrates with a buried WSi2 plane that is connected to ground; hence it is called a ground plane. A Faraday cage structure that exhibits very high degrees of signal isolation is presented and compared to other SOI isolation schemes. The Faraday cage structure is shown to achieve 20 dB increased isolation in the frequency range of 0.5-50 GHz compared to published data for high resistivity (200 Ω.cm) thin film SOI substrates with no ground planes, but where capacitive guard rings were used. The measurement results are analysed with the aid of planar electromagnetic simulators and compact lumped element models of all the fabricated test structures are developed. The accuracy of the lumped models is validated against experimental measurements.
         
      
      
        
          
            
  
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      Published date: 2002
 
    
  
  
    
  
    
  
    
  
    
  
    
  
    
  
    
  
    
  
  
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        Local EPrints ID: 464837
        URI: http://eprints.soton.ac.uk/id/eprint/464837
        
        
        
        
          PURE UUID: 7af28195-8a64-4d78-bd89-d155befec8d4
        
  
    
        
          
        
    
  
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  Date deposited: 05 Jul 2022 00:04
  Last modified: 16 Mar 2024 19:46
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          Author:
          
            
            
              Stefanos Stefanou
            
          
        
      
      
      
    
  
   
  
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