Evaluating hardware reliability in the presence of soft errors

Abstract

Reliability has been a major concern in embedded systems. Higher transistor density and lower voltage supply increase the vulnerability of embedded systems to soft errors. A Single Event Upset (SEU), which is also called a soft error, can reverse a bit in a sequential element, resulting in a system failure. Simulation-based fault injection has been widely used to evaluate reliability, as suggested by ISO26262. However, it is practically impossible to test all faults for a complex design. Random fault injection is a compromise that reduces accuracy and fault coverage. Formal verification is an alternative approach. This research aims to utilize formal verification to evaluate the hardware reliability of a RISC-V Ibex Core in the presence of soft errors. We combine formal verification and fault injection, and perform backward tracing to identify and categorize faults according to fault effects (no effect, Silent Data Corruption, crash, and hang). With the help of formal verification, the entire state space and fault list can be exhaustively explored. We found that misaligned instructions can amplify fault effects. Apart from evaluating hardware reliability, the proposed method can help to determine a cost-effective fault protection strategy. We demonstrate how to use the method to formally evaluate the protection effectiveness of fault-tolerant technologies, for example, by identifying faults that can and cannot be detected/protected by fault-tolerant technologies. Formal verification, such as model checking, has limited applicability to Double Event Upsets (DEUs), due to infeasible runtime, proving efforts, and state explosion. We develop a DEU exploration strategy that significantly reduces model checking runtime and efforts to explore DEUs. We also mitigate state explosion using abstractions and proper constraints. As a consequence, we successfully scale our method to explore DEUs within an acceptable time. We found that DEUs can aggravate SEUs: a DEU consisting of two SEUs that cause no effect can cause a system failure.

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Identifiers

ORCID for Bing Xue: orcid.org/0009-0000-4009-9277

ORCID for Mark Zwolinski: orcid.org/0000-0002-2230-625X

ORCID for Basel Halak: orcid.org/0000-0003-3470-7226

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