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Fast-path in-network inference on Intel Infrastructure Processing Units

Fast-path in-network inference on Intel Infrastructure Processing Units
Fast-path in-network inference on Intel Infrastructure Processing Units
SmartNICs enable low-latency in-network machine learning (ML) inference; however, existing approaches are constrained by limited or absent P4 programmability and inadequate support for stateful inference in the fast path. The emergence of Intel Infrastructure Processing Units (IPUs) offers a new opportunity to combine P4-programmable fast-path processing with on-board compute capabilities. In this demo, we showcase the first in-network ML inference system on Intel IPUs using P4. We map decision tree models to match-action pipelines in the fast path and augment them with stateful features computed on IPU cores and integrated at runtime. Our system achieves real-time, wire-speed classification with up to 99% accuracy while maintaining low latency comparable to L2 forwarding.
Akem, Aristide Tanyi-Jong
93f00cae-55f5-4db3-89cb-5c14cb969353
Akem, Aristide Tanyi-Jong
93f00cae-55f5-4db3-89cb-5c14cb969353

Akem, Aristide Tanyi-Jong (2026) Fast-path in-network inference on Intel Infrastructure Processing Units. 2026 IEEE 12th International Conference on Network Softwarization (NetSoft), Fraunhofer – Institut Für Offene Kommunikationssysteme (FOKUS), Kaiserin-Augusta-Allee 31, Berlin, Germany. 29 Jun - 03 Jul 2026. 3 pp . (In Press)

Record type: Conference or Workshop Item (Poster)

Abstract

SmartNICs enable low-latency in-network machine learning (ML) inference; however, existing approaches are constrained by limited or absent P4 programmability and inadequate support for stateful inference in the fast path. The emergence of Intel Infrastructure Processing Units (IPUs) offers a new opportunity to combine P4-programmable fast-path processing with on-board compute capabilities. In this demo, we showcase the first in-network ML inference system on Intel IPUs using P4. We map decision tree models to match-action pipelines in the fast path and augment them with stateful features computed on IPU cores and integrated at runtime. Our system achieves real-time, wire-speed classification with up to 99% accuracy while maintaining low latency comparable to L2 forwarding.

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Accepted/In Press date: 27 April 2026
Venue - Dates: 2026 IEEE 12th International Conference on Network Softwarization (NetSoft), Fraunhofer – Institut Für Offene Kommunikationssysteme (FOKUS), Kaiserin-Augusta-Allee 31, Berlin, Germany, 2026-06-29 - 2026-07-03

Identifiers

Local EPrints ID: 511325
URI: http://eprints.soton.ac.uk/id/eprint/511325
PURE UUID: faf75634-7f0e-4c29-baa0-23997d8bf49b
ORCID for Aristide Tanyi-Jong Akem: ORCID iD orcid.org/0000-0002-4359-0173

Catalogue record

Date deposited: 12 May 2026 16:32
Last modified: 13 May 2026 02:15

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Contributors

Author: Aristide Tanyi-Jong Akem ORCID iD

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