Synthesis of multi-FPGA systems with asynchronous communications

Abstract

MOODS (Multiple Objective Optimisation in Data and control path Synthesis) is a high-level synthesis system which provides the ability to synthesise a system level behavioural description into a structural representation.  This thesis describes an enhancement to the original MOODS system that provides an automated mechanism to target a single behavioural input design onto heterogeneous re-configurable devices, forming a multi-FPGA system.  This thesis focuses on some of the problems associated with multi-FPGA synthesis, in particular the area utilisation of target devices and input/output (I/O) constraints in a multi-FGPA system.

The multi-FPGA partitioning mechanism has added a new optimisation objective into the MOODS synthesis system.  Not only does it provide an automated means of partitioning the design into separate blocks, the partitioning algorithm optimises the utilisation of device area and I/O taking into account the activity profile of the design, and allows performance and I/O utilisation trade-offs to be considered.  Asynchronous channel-based communication and pipelining techniques in multi-FPGA synthesis can produce a multi-FPGA system with performance close to a single-device implementation.

Results showed that the multi-FPGA synthesis enhancement integrated within the MOODS environment provided a rapid realisation of pipelined multi-FPGA systems with asynchronous communication channels at the expense of an acceptable increase in area overhead and design latency.

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